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 HC-5524
Data Sheet February 1999 File Number 2798.6
EIA/ITU 24V PABX SLIC with 25mA Loop Feed
The HC-5524 telephone Subscriber Line Interface Circuit integrates most of the BORSCHT functions on a monolithic IC. The device is manufactured in a Dielectric Isolation (DI) process and is designed for use as a 24V interface between the traditional telephone subscriber pair (Tip and Ring) and the low voltage filtering and coding/decoding functions of the line card. Together with a secondary protection diode bridge, the device will withstand 500V induced surges, in plastic packages. The SLIC also maintains specified transmission performance in the presence of externally induced longitudinal currents. The BORSCHT functions that the SLIC provides are: * Battery Feed with Subscriber Loop Current Limiting * Overvoltage Protection * Ring Relay Driver * Supervisory Signaling Functions * Hybrid Functions (with External Op-Amp) * Test (or Battery Reversal) Relay Driver In addition, the SLIC provides selective denial of power to subscriber loops, a programmable subscriber loop current limit from 20mA to 60mA, a thermal shutdown with an alarm output and line fault protection. Switch hook detection, ring trip detection and ground key detection functions are also incorporated in the SLIC device. The HC-5524 SLIC is ideally suited for line card designs in PBX and DLC systems, replacing traditional transformer solutions.
Features
* DI Monolithic High Voltage Process * Compatible with Worldwide PBX and DLC Performance Requirements * Controlled Supply of Battery Feed Current with Programmable Current Limit * Operates with 5V Positive Supply (VB+) * Internal Ring Relay Driver and a Utility Relay Driver * High Impedance Mode for Subscriber Loop * High Temperature Alarm Output * Low Power Consumption During Standby Functions * Switch Hook, Ground Key, and Ring Trip Detection * Selective Power Denial to Subscriber * Voice Path Active During Power Denial * On-Chip Op Amp for 2-Wire Impedance Matching
Applications
* Solid State Line Interface Circuit for PBX or Digital Loop Carrier Systems * Hotel/Motel Switching Systems * Direct Inward Dialing (DID) Trunks * Voice Messaging PBXs * 2-Wire/4-Wire, 4-Wire/2-Wire Hybrid * Related Literature - AN9607, Impedance Matching Design Equations - AN9628, AC Voltage Gain - AN9608, Implementing Pulse Metering - AN549, The HC-5502S/4X Telephone Subscriber Line Interface Circuits (SLIC)
Ordering Information
PART NUMBER HC4P5524-9 HC9P5524-5 TEMP. RANGE (oC) -40 to 85 0 to 75 PACKAGE 44 Ld PLCC 28 Ld SOIC PKG. NO. N44.65 M28.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HC-5524
Absolute Maximum Ratings (Note 1)
Maximum Supply Voltages (VB+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V (VB+) - (VB-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Relay Drive Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 15V
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . -65oC to TA to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (PLCC and SOIC - Lead Tips Only)
Operating Conditions
Operating Temperature Range HC-5524-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to TA to 75oC HC-5524-9 . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to TA to 85oC Relay Driver Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 12V Positive Power Supply (VB+) . . . . . . . . . . . . . . . . . . . . . . . . 5V 5% Negative Power Supply (VB-). . . . . . . . . . . . . . . . . . . . -20V to -28V
Die Characteristics
Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224 Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . .174 mils x 120 mils Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER AC TRANSMISSION PARAMETERS RX Input Impedance TX Output Impedance 4-Wire Input Overload Level 2-Wire Return Loss SRL LO ERL SRL HI 2-Wire Longitudinal to Metallic Balance Off Hook 4-Wire Longitudinal Balance Off Hook Low Frequency Longitudinal Balance
300Hz to 3.4kHz, (Note 3)
-
100 35 40 40 63 55 -80 10 0.05 0.05 0.02
20 -67 23 40 0.2 0.2 0.2 0.06
k VPEAK dB dB dB dB dB dBmp dBrnC mARMS dB dB dB dB
300Hz to 3.4kHz, 600 Reference Matched for 600, (Note 3)
+1.0 26 30 30
Per ANSI/IEEE STD 455-1976, 300Hz to 3400Hz, (Note 3) Per ANSI/IEEE STD 455-1976, 300Hz to 3400Hz, (Note 3) R.E.A. Test Circuit ILINE = 40mA, TA = 25oC (Note 3) ILINE = 40mA, TA = 25oC (Note 3) -1.58dBm at 1kHz, Referenced 600 0dBm at 1kHz, Referenced 600 -1.58dBm at 1kHz, Referenced 600 300Hz to 3400Hz, Referenced to Absolute Level at 1kHz, 0dBm Referenced 600 (Note 3) Referenced to -10dBm, (Note 3) +3 to -40dBm -40 to -50dBm -50 to -55dBm
58 50 -
Longitudinal Current Capability Insertion Loss 2-Wire/4-Wire 4-Wire/2-Wire 4-Wire/4-Wire Frequency Response Level Linearity 2-Wire to 4-Wire and 4-Wire to 2-Wire
-
-
0.08 0.12 0.3
dB dB dB
2
HC-5524
Electrical Specifications
Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified (Continued) TEST CONDITIONS (Note 2) 300Hz to 3400Hz 300Hz to 3400Hz 300Hz to 3400Hz Reference Level 0dBm at 600, 300Hz to 3400Hz (Note 3) C-Message, (Note 3) Psophometric 3kHz Flat Open Loop Voltage (VTIP - VRING) Power Supply Rejection Ratio VB+ to 2-Wire VB+ to 4-Wire VB- to 2-Wire VB- to 4-Wire VB+ to 2-Wire VB+ to 4-Wire VB- to 2-Wire VB- to 4-Wire Ring Sync Pulse Width DC PARAMETERS Loop Current Programming Limit Range Accuracy Loop Current During Power Denial Fault Currents TIP to Ground RING to Ground TIP and RING to Ground Switch Hook Detection Threshold Ground Key Detection Threshold Thermal ALM Output Ring Trip Detection Threshold Ring Trip Detection Period Dial Pulse Distortion Relay Driver Outputs On Voltage VOL Off Leakage Current TTL/CMOS Logic Inputs (F0, F1, RS, TST, PRI) Logic `0' VIL Logic `1' VIH Input Current (F0, F1, RS, TST, PRI) Logic Outputs Logic `0' VOL Logic `1' VOH 0V VIN 5V ILOAD = 800A ILOAD = 40A IOL (PR) = 60mA, IOL (RD) = 30mA VOH = 13.2V Safe Operating Die Temperature Exceeded VRING = 105VRMS, fRING = 20Hz RL = 200 20 10 140 2.0 2.7 4 30 120 150 12 10 10 100 0.1 0.2 10 0.1 60 7 15 160 150 0.5 0.5 100 0.8 5.5 100 0.5 mA % mA mA mA mA mA mA
oC
PARAMETER Absolute Delay 2-Wire/4-Wire 4-Wire/2-Wire 4-Wire/4-Wire Total Harmonic Distortion 2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire Idle Channel Noise 2-Wire and 4-Wire
MIN -
TYP 0.95 -
MAX 1 1 1.5 -50
UNITS s s s dB
20 20 20 20
15.8 40 40 40 50 40 28 50 50 -
5 -85 16 500
dBrnC dBmp dBrn V dB dB dB dB dB dB dB dB s
VB+ = 5V, VB- = -24V 30Hz to 200Hz, RL = 600, (Note 3)
200Hz to 16kHz, RL = 600
30 20 20 20 50
mA ms ms V A V V A V V
3
HC-5524
Electrical Specifications
Typical Parameters are at TA = 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Specified at 600W 2-Wire Terminating Impedance, Unless Otherwise Specified (Continued) TEST CONDITIONS Relay Drivers Off VB+ = 5.25V, VB- = -28V, RLOOP = VB+ = 5V, VB- = -24V, RLOOP = 600 VB+ = 5V, VB- = -24V, RLOOP = 600 VB+ = 5.25V, VB- = -28V, RLOOP = MIN -4 -28 TYP 60 3 -24 5 10 1 3 1 MAX 4 6 UNITS mW mA mA mA mA
PARAMETER Power Dissipation On Hook IB+ IBIB+ IBUNCOMMITTED OP AMP PARAMETERS Input Offset Voltage Input Offset Current Differential Input Resistance Output Voltage Swing Small Signal GBW NOTE: (Note 3) RL = 10k (Note 3)
-
-
mV nA M VP-P MHz
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance.
Pin Descriptions
SOIC 1 2 3 4 PLCC 2 3 4 8 SYMBOL AG (Note 4) VB+ C1 F1 DESCRIPTION Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive input terminals. Positive Voltage Source - Most Positive Supply. Capacitor #C1 - An external capacitor to be connected between this terminal and analog ground. Required for proper operation of the loop current limiting function. Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page. F1 should be toggled high after power is applied. Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally select logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page. Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse (50s - 500s) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5V. Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output. Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output. A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper F1, F0 state is set and will keep ALM low. See Truth Table on front page. A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on front page. It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduce component life. Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage divider. The analog output of the spare operational amplifier. The inverting analog input of the spare operational amplifier.
5 6
9 10
F0 RS
7 8 9 10
11 12 13 17
SHD GKD TST ALM
11 12 13
18 19 20
ILIMIT OUT1 -IN1
4
HC-5524 Pin Descriptions
SOIC 14 PLCC 22 (Continued) DESCRIPTION An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop monitoring purposes. An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor. Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes. Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins must be shorted. Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip Feed and Ring Feed amplifiers differentially. Capacitor #2 - An external capacitor to be connected between this terminal and ground. It prevents false ring trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines and other noise sources. This capacitor should be nonpolarized. Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement two to four wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is necessary. A TTL compatible input used to control PR. PRI active High = PR active low. An active low open collector output. Can be used to drive a Polarity Reversal Relay. Digital Ground - To be connected to zero potential. Serves as a reference for all digital inputs and outputs on the SLIC. Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ringing signals onto the 2-Wire line. Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal and the spare op-amp to accommodate 2-Wire line impedance matching. (This is not used in the typical applications circuit). Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitudinal currents. Must be tied to TF1. Tie directly to TF2 in the PLCC application. Ring Feed - A low impedance analog output connected to the RING terminal through a feed resistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal currents. Tie directly to RF2. Tie directly to RF1 in the PLCC application. The battery voltage source. The most negative supply. Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground terminal. No internal connection.
SYMBOL TIP
15 16
24 25
RING RFS
17 18
27 31
VRX C2
19
32
VTX
20 21 22 23 24 25
33 34 35 36 37 38
PRI PR DG (Note 4) RD VFB (Note 5) TF2
NA 26
39 41
TF1 RF1
NA 27 28
42 43 44 1, 5, 6, 7, 14, 15, 16, 21, 23, 26, 28, 29, 30, 40
RF2 VBBG (Note 4) NC
NOTES: 4. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 5. Although not used in the typical applications circuit, VFB may be used in matching complex 2-Wire impedances.
5
HC-5524 Pinouts
HC-5524 (SOIC) TOP VIEW
N/C N/C AG VB+ C1 F1 F0 RS SHD GKD TST 1 2 3 4 5 6 7 8 9 28 BG 27 VB26 RF 25 TF 24 VFB 23 RD 22 DG 21 PR 20 PRI 19 VTX 18 C2 17 VRX 16 RFS 15 RING
HC-5524 (PLCC) TOP VIEW
VB+ RF2 RF1 N/C C1 BG AG VBN/C 39 38 37 36 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 ILMT TIP N/C -IN 1 OUT 1 RING VRX N/C N/C RFS N/C
TRUTH TABLE
6 5 4 32 1 44 43 42 41 40 TF1 TF2 VFB RD DG PR PRI VTX C2 N/C N/C
F1 0 0 1 1 1
F0 0 1 0 0 1
Action
N/C
7 8 9 10 11 12 13 14 15 16 17
Normal Loop Feed RD Active Power Down Latch RESET Power on RESET Loop Power Denial Active
F1 F0 RS SHD GKD TST N/C N/C N/C ALM
ALM 10 ILMT 11 OUT 1 12 -IN 1 13 TIP 14
6
HC-5524 Functional Diagram
DIP OR SOIC
R TF R + VRX 17 OUT1 12 -IN1 13 + OP AMP RF1 2R R R TIP 14 R R 4.5k 100k RING 15 100k 100k RFS 16 100k 4.5k 90k RFC 90k 26 RF R = 108k 10 ALM RF + 3 C1 90k + 25k FAULT DET 25k LA RTD GKD GK + 2R 2R TA SHD THERM LTD SH IIL LOGIC INTERFACE 4 F1 5 F0 6 RS TSD 9 TST 20 PRI 21 PR 23 RD 7 SHD 8 GKD VFB 24 VTX 19 VB + 2 DG 22 AG 1 28 BG
TF
25
-
2R R/2
-
BIAS NETWORK
27
VB -
-
-
90k
-
VB/2 REF C2
18
+ GM
-
RF2 11 ILIMIT
PLCC
38 TF2 TF1 39 TF R + R VRX 27 OUT 1 19 -IN 1 20 VFB 37 VTX 32 VB+ 3 DG 35 AG 2 44 + OP AMP RF1 2R R R TIP 22 R R 4.5k 100k RING 24 100k 100k RFS 25 100k 4.5k 90k 42 RF2 RF1 41 RF + 4 C1 C2 90k + 25k FAULT DET 25k LA RTD GKD GK + 2R 2R 9 TA SHD THERM LTD SH IIL LOGIC INTERFACE 10 RS TSD 13 TST 33 PRI 34 PR 36 RD 11 SHD 12 GKD RFC 17 ALM 90k GM VB/2 REF 31 8 F1 F0 BG
-
2R R/2
-
BIAS NETWORK
43
VB-
-
-
90k
-
+
-
RF2 18 ILIMIT
NOTES: 6. R = 108k. 7. NC = 1, 5, 6, 7, 14, 15, 16, 21, 23, 26, 28, 29, 30, 40.
7
HC-5524 Logic Diagram
RS TTL TO I2L RELAY DRIVER TTL TO I2L F0 I2L TO TTL GKD GK I2L TO TTL SHD TTL TO I2L F1 THERMAL SHUT DOWN I2L TO TTL ALM RD
PD SH
THERMAL SHUTDOWN LATCH TTL TO I2L A B C KEY
TO BIAS NETWORK
INJ A B C
TEST
Overvoltage Protection and Longitudinal Current Protection
The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses. High voltage surge conditions are as specified in Table 1. The SLIC will withstand longitudinal currents up to a maximum or 40mARMS, 20mARMS per leg, without any performance degradation.
PARAMETER Longitudinal Surge Metallic Surge TABLE 1. TEST CONDITION 10s Rise/ 1000s Fall 10s Rise/ 1000s Fall T/GND R/GND 50/60Hz Current T/GND R/GND 11 Cycles Limited to 10ARMS 700 (Plastic) V RMS 10s Rise/ 1000s Fall 1000 (Plastic) VPEAK 1000 (Plastic) VPEAK PERFORMANCE (MAX) 1000 (Plastic) UNITS VPEAK
8
HC-5524 Typical Applications
5V 5V K1 RS1 CS1 K2 SHD GKD PRI RS TEST F1 ALARM F0 RD PR RB1 SECONDARY PROTECTION (NOTE 6) VBC5 PRIMARY PROTECTION KIB RS2 CS2 RFS VRING RING PTC C3 C4 5V 150VPEAK (MAX) RB2 RING VBOUT1 TO HYBRID BALANCE NETWORK BG C2 DG AG VB+ C1 SLIC HC-5524 RF2 (NOTE 7) RF1 (NOTE 7) TIP TF1 (NOTE 7) TF2 (NOTE 7) VFB CAC VTX KRF -IN1 K(Z0 - RF/2) ILIMIT VRX+ RL1 FROM PCM FILTER/CODER RL2 SYSTEM CONTROLLER
TIP
K1A
Z1
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values C1 = 0.5F, 20V. C2 = 1.0F 10%, 20V (for other values of C2, refer to AN9667). C3 = 0.01F, 50V 20%. C4 = 0.01F, 50V 20%. C5 = 0.01F, 50V 20%. CAC = 0.5F, 20V. K(Z0 - RF/2) = 50k, (Z0 = 600, K = Scaling Factor = 100). RL1, RL2; Current Limit Setting Resistors. RL1+RL2 > 90k.
NOTES: 8. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first. 9. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used. 10. Secondary protection diode bridge recommended is 3A, 200V type. 11. TF1, TF2 and RF1, RF2 are on PLCC only and should be connected together as shown.
ILIMIT = (.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100k. KRF = 20k, RF = 2(RB1+RB2), K = Scaling Factor = 100). RB1 = RB2 = 50 (1% absolute, matching requirements covered in a Tech Brief). RS1 = RS2 = 1k typically. CS1 = CS2 = 0.1F, 200V typically, depending on VRing and line length. Z1 = 150V to 200V transient protector. PTC used as ring generator ballast.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
9


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